Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.
For more information, visit https://www.renesas.com
Responsibilities:
- Participate in feasibility studies and sub-block/chip-level architecture definition
- Design and integration of digital sub-blocks at top-level
- Support DFT strategy and implementation
- Work closely with back-end designers to correctly implement digital designs to layout
- Verification planning, verification methodology and test bench development using Verilog/VHDL
- Static timing analysis (STA), formal verification, logic equivalence checking
- Lab evaluation and debug of digital blocks and full chip function
- Support production test and HW/SW development for evaluation, characterization and testing
- Tape out database and document preparation
- Participate and consult in IC design reviews

The role:
- Master’s or Ph.D. in Electrical Engineering or related disciplines
- Preferably some experience in design of analog/digital circuits (0−1 for junior designers)
- Knowledge of Xcelium,(System)Verilog/VHDL/scripting languages
- Full understanding of IC design flow
- Ability to prioritize work, set goals and meet deadlines
- Self-motivated and take full responsibility for solutions
- Good written, communication and teamwork skills
- (pre-)intermediate English level

Will be a plus:
- Familiarity with Cadence Virtuoso
- Experience with IC technologies, DFT or protocols (UART, I2C, SPI, etc.)
- Knowledge of transistor-level integrated circuits and semiconductor physics
- Understanding of advanced verification methodologies (e.g. UVM, ABV)
- Familiarity with RTL logic design, design constraints, synthesis, P&R, static timing analysis and formal verification

We offer:
- Friendly and highly professional team;
- 14 calendar days paid vacation;
- Flexible working hours;
- Professional & personal growth.
- Fixed-term contract 6 months (with the possibility of extension afterwards).
- Part-Time employment (20/10 work hours per week).

Контактна інформація →